Hi all.

I'm trying to decode this ARM instruction, but I'm having a little trouble identifying what it is, it's hexcode is: 0xE121F000.

The closest match I can find is MSR, but it definatly can't be it, observe:

CODE

instruction:     1110 00010 0 1000011111 00000000 0000
MSR instruction: cond 00010 P 1010011111 00000000 Rm..
                            ^   ^                 ^
                            |   + incorrect bit   + source register
                            + Destination PSR (0=CPSR, 1=SPSR)

DSEmu seems to think it's MSR, but that single incorrect bit says it's not.
Can anyone help shed light on this subject?
Thanks.

Sorry for the delay, first of all. I don't pop by here much any more.

To your opcode. E is simple, condition "always". 12 is definitely MSR_cpsr/reg, and the 1 after that means it's a "control-field" transfer, with r0 defined down the bottom there.

I've inserted another couple of spaces in your bitfield above, which should allow you to highlight that. As far as ddi0100e (the opcode reference) says, this is unambiguously "MSR cpsr_c, r0".